Digital circuits with high performance and low power consumption typically require transistors adopting complementary metal-oxide-semiconductor (CMOS) structures. A representative of metal oxide semiconductors is indium gallium zinc oxide (IGZO). However, due to a large number of defect states exist in a top of the valence band of IGZO, these defects may exhaust holes, such that IGZO is only expressed as N-type unipolar semiconductor, and the lack of P-type semiconductor makes a design of a logic circuit based on facing difficulties.
Currently, the design of the logic circuit related to the IGZO TFT may be roughly divided into two types.
A first type is using a Pseudo-CMOS transistor composed of an IGZO TFT to implement a NOT gate (inverter). In the Pseudo-CMOS design, because a load transistor and a driving transistor have voltages with different thresholds, IGZO TFT with depletion mode and enhancement mode are prepared on the same sample at the same time. Therefore, the introduction of dual-gate structure or dual-layer active layer structure and extra illumination of the load transistor are developed and applied to the process of the Pseudo-CMOS transistors consisting of the IGZO TFT. However, even if these processes are adopted to improve the inverter, it fails to solve the problem of high static power consumption and small noise margin of the pseudo-CMOS.
A second type is using of a hybrid CMOS transistor to achieve a NOT gate (inverter). That is, a P-type load transistor (PMOS transistor) may be achieved using other semiconductor materials. In the past design of hybrid CMOS transistors, the semiconductor material used by the P-type load transistor is either a two-dimensional carbon nanotube (CNT) material or an organic semiconductor material. However, in the producing process of the CNT material, some of the materials are always be metalized, organic semiconductor TFT has low mobility, poor stability and is sensitive to water and oxygen in the environment. Therefore, a scheme for a large-scale preparation of a hybrid CMOS transistor remains to be studied.